1. Field of the Invention
This invention relates to a technical field of a semiconductor memory device having a configuration in which a logic level of a signal is determined based on a reference signal input from outside and a memory module in which a plurality of the above-mentioned semiconductor memory devices are connected to form an integrated memory.
2. Description of the Related Art
Memory modules having a plurality of semiconductor memory devices connected integrally have been conventionally used widely to construct a large capacity memory system. For example, a memory module having a configuration in which a plurality of DRAM chips is mounted on a circuit board and required signals can be transmitted through common wiring between a memory controller and the DRAM chips is employed.
Generally, in the DRAM chip, a signal having a reference voltage (herein after referred to as a VREF signal) is necessary to determine a logic level of a signal input from a DQ terminal and the like. From the viewpoint of improvements in accuracy, a specification is employed in which the VREF signal is supplied from outside without being generated inside for the recent DRAM chips. Thus, the above-mentioned memory module generally has a configuration in which the VREF signal is supplied to a plurality of DRAM chips through common wiring from a VREF voltage generator or the like disposed outside the DRAM chips.
In recent years, the operation speed has been increased with the progress of DRAM standards. For example, a high-speed operating clock of 200 to 400 MHz is used in the case of DDR2 (Double Data Rate 2)-SDRAM (Synchronous DRAM). In the memory module, if high-frequency noise occurs due to the operation using the operating clock in a certain DRAM chip, the noise is transmitted to other DRAM chips through the common wiring for the VREF signal. In this case, since a frequency band of the noise is of order of 100 MHz, it is difficult to take measures such as decoupling and the like on the circuit board of the memory module.
In particular, if the noise is mixed with the VREF signal and transmitted through the common wiring, it becomes a problem that malfunction of the DRAM chip occurs. That is, since the VREF signal used to determine the logic level of a signal has a low tolerance for noise, it is feared that a slight variation in the level prevents the accurate determination of the logic level.
For example, a configuration is known as conventional measures against the noise of the conventional semiconductor chip, in which a filter composed of a resistor and a capacitor is provided at an input side of a circuit to which a signal is input (for example, JP 2002-124570). However, such a filter is provided mainly to avoid EMC problem of the semiconductor chip, and is not effective as measures against the malfunction due to the VREF signal requiring high accuracy.